Output is 1 only when the inputs differ.
Y lags its inputs by the gate's propagation delay — 280 ms here, a few nanoseconds on a real chip.
| A | B | Y |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
Flip the switches on the diagram — or click a row to jump straight to that input combination.